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 bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
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SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
SINGLE-CHIP, LI-ION AND LI-POL CHARGER IC WITH AUTONOMOUS USB-PORT AND AC-ADAPTER SUPPLY MANAGEMENT (bqTINYTM-II)
FEATURES
* * Small 3 mm x 3 mm MLP Package Charges and powers Systems from Either AC Adapter or USB With Autonomous power-Source Selection Integrated USB Control With Selectable 100 mA and 500 mA Charge Rates Ideal for Low-Dropout Charger Designs for Single-Cell Li-Ion or Li-pol Packs in Space Limited portable applications Integrated power FET and Current Sensor for Up to 1-A Charge applications From AC Adapter Precharge Conditioning With Safety Timer power Good (AC Adapter Present) Status Output Optional Battery Temperature Monitoring Before and During Charge Automatic Sleep Mode for Low-power Consumption
DESCRIPTION
The bqTINY-II series are highly-integrated, flexible Li-Ion linear charge and system power management devices for space-limited charger applications. In a single monolithic device, the bqTINY-II offers integrated USB-port and ac-adapter supply management with autonomous power-source selection, power-FET and current-sensor interfaces, high-accuracy current and voltage regulation, charge status, and charge termination. The bqTINY-II automatically selects the USB-port or the ac-adapter as the power source for the system. In the USB configuration, the host can select from two preset charge rates of 100 mA or 500 mA. In the ac-adapter configuration, an external resistor sets the system or charge current. The bqTINY-II charges the battery in three phases: conditioning, constant current, and constant voltage. Charge is terminated based on minimum current. An internal charge timer provides a backup safety for charge termination. The bqTINY-II automatically restarts the charge if the battery voltage falls below an internal threshold. The bqTINY-II automatically enters sleep mode when both supplies are removed.
* *
*
* * * *
APPLICATIONS
* * * * PDAs, MP3 Players Digital Cameras Internet appliances Smartphones
VDC AC ADAPTER GND 1
bq24020DRC AC OUT 10
PACK+
BATTERY PACK + SYSTEM
PACK-
VBUS
2 3
USB STAT1
TS CE
9 8 7 RSET 6
SYSTEM INTERFACE
USB PORT
GND
4 5
STAT2 ISET2 VSS ISET1
D+ D-
UDG-02184
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. bqTINY is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2002-2006, Texas Instruments Incorporated
bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
Different versions of the bqTINY-II offer many additional features. These include a temperature-sensor input for detecting hot or cold battery packs, a power-good output (PG) indicating the presence of input power, a TTL-level charge-enable input (CE) used to disable or enable the charge process, and a TTL-level timer and taper-detect enable input (TTE) used to disable or enable the fast-charge timer and charge termination. ORDERING INFORMATION
TJ CHARGE REGULATION VOLTAGE (V)(1) 4.2 4.2 4.2 - 40C to 125C 4.2 4.2 4.2 4.2 (1) OPTIONAL FUNCTIONS (1) CE and TS PG and CE CE and TTE TTE and TS CE and TS TE and TS PG and CE FAST-CHARGE TIMER (Hours) 5 5 5 5 7 7 7 TAPER TIMER Yes Yes Yes Yes Yes No No USB TAPER THRESHOLD 10% of ISET1 Level 10% of ISET1 Level 10% of ISET1 Level 10% of ISET1 Level 10% of ISET1 Level 10% of selected USB charge rate 10% of selected USB charge rate PART NUMBER(2) bq24020DRCR bq24022DRCR bq24023DRCR bq24024DRCR bq24025DRCR bq24026DRCR BQ24027DRCR MARKINGS AZS AZU AZV AZW AZX ANR ANS
The DRC package is available taped and reeled only in quantities of 3,000 devices per reel.
Dissipation Ratings
PACKAGE DRC (1) (1) JA 46.87 C/W TA < 40C POWER RATING 1.5 W DERATING FACTOR ABOVE TA = 25C 0.021 W/C
This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is connected to the ground plane by a 2x3 via matrix.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
bq24020, bq24022, bq24023, bq24024 bq24025, bq24026 BQ24027 Input voltage (2) Output sink/source current Output current Output current Junction temperature range, TJ Storage temperature, Tstg Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds (1) (2) AC, CE, ISET1, ISET2, OUT, PG, STAT1, STAT2, TE, TS, TTE, USB STAT1, STAT2, PG TS OUT -0.3 to 7.0 15 200 1.5 -40 to 125 -65 to 150 300 C UNIT
V mA A A
Operating free-air temperature range, TA
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to VSS.
2
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bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN Supply voltage (from AC input), VCC Supply voltage (from USB input), VCC Operating junction temperature range, TJ 4.5 4.35 -40 NOM MAX 6.5 6.5 125 UNIT V V C
ELECTRICAL CHARACTERISTICS
over 0C TJ 125C and recommended supply voltage, unless otherwise noted
PARAMETER INPUT CURRENT ICC(VCC) ICC(SLP) ICC(STBY) IIB(OUT) IIB(CE) IIB(TTE) IIB(TE) VO(REG) VCC current Sleep current Standby current Input current on OUT pin Input current on CE pin Input bias current on TTE pin Input bias current on TE pin Output voltage, Voltage regulation accuracy V(DO) AC dropout voltage (V(AC)-V(OUT)) TA = 25C VO(OUT) = VO(REG) VO(REG) + V(DO-MAX)) VCC VO(OUT) = VO(REG) VO(REG) + V(DO-MAX)) VCC VO(OUT) = VO(REG) VO(REG) + V(DO-MAX)) VCC VI(OUT) > V(LOWV) VI(AC)- VI(OUT) > V(DO-MAX) VCC(MIN) 4.5 V VUSB- VI(OUT) > V(DO-MAX) VCC(MIN) 4.5 V VUSB- VI(OUT) > V(DO-MAX) IO(OUT) = 1A ISET2 = High ISET2 = Low -0.35% -1% 350 350 60 4.20 0.35% 1% 500 500 100 mV VCC > VCC(min) Sum of currents into OUT pin, VCC < V(SLP) CE = High Charge DONE 0C TJ 85C VCC > VCC(MIN) 1.2 2 1 2.0 5 150 5 1 1 1 V A mA TEST CONDITIONS MIN TYP MAX UNIT
VOLTAGE REGULATION VO(REG) + V(DO-MAX) VCC , I(TERM) < IO(OUT) 1 A
V(DO)
USB dropout voltage (V(USB) - V(OUT))
CURRENT REGULATION IO(OUT) AC output current range (1) VCC 4.5 V VI(OUT) > V(LOWV) ISET2 = Low VI(OUT) > V(LOWV) ISET2 = High 50 80 400 2.463 307 296 246 2.500 322 320 320 1000 100 500 2.538 337 346 416 V mA
IO(OUT)
USB output current range
V(SET)
Output current set voltage
Voltage on ISET1 pin, VCC 4.5 V, VIN 4.5 V, VI(OUT) > V(LOWV), VIN- VI(OUT) > V(DO-MAX) 50 mA IO(OUT) 1 A 10 mA IO(OUT) < 50 mA 1 mA IO(OUT) < 10 mA
K(SET)
Output current set factor
(1)
IO(OUT) +
K(SET)
V(SET)
RSET
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bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
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ELECTRICAL CHARACTERISTICS (continued)
over 0C TJ 125C and recommended supply voltage, unless otherwise noted
PARAMETER Precharge to fast-charge transition threshold Deglitch time for fast-charge to precharge transition IO(PRECHG) V(PRECHG) Precharge range (2) Precharge set voltage TEST CONDITIONS Voltage on OUT pin VCC(MIN) 4.5 V, tFALL = 100 ns, 10 mV overdrive, VI(OUT) decreasing below threshold 0 V < VI(OUT) < V(LOWV), t < t(PRECHG) Voltage on ISET1 pin 0 V < VI(OUT) > V(LOWV), VI(OUT) > V(RCH), t < t(TAPER) VI(OUT) > V(RCH), ISET2 = Low VI(OUT) > V(RCH), ISET2 = High Voltage on ISET1 pin, VO(REG) = 4.2 V, VI(OUT) > V(RCH), t < t(TAPER) Voltage on ISET1 pin, VO(REG) = 4.2 V, VI(OUT) > V(RCH) VCC(MIN) 4.5 V, tFALL = 100 ns charging current increasing or decreasing above and below, 10 mV overdrive VCC(MIN) 4.5 V, tFALL = 100 ns charging current decreasing below, 10 mV overdrive PTC thermistor PTC thermistor VO(REG) = 4.2 V t < t(PRECHG) MIN 2.8 250 5 240 255 TYP 3.0 375 MAX 3.2 500 100 270 UNIT PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION V(LOWV) V ms mA mV
CHARGE TAPER AND TERMINATION DETECTION I(TAPER) Charge taper detection range (3) USB-100 charge taper detection level USB-500 charge taper detection level V(TAPER) V(TERM) t(TPRDET) t(TRMDET) bq24026 bq24026 5 6.5 32 235 11 250 9 44 250 18 375 100 11 mA 55 265 25 500 ms 250 375 500 mV
Charge taper detection set voltage Charge termination detection set voltage (4) Deglitch time for TAPER detection Deglitch time for termination detection High-voltage threshold Low-voltage threshold Current source Deglitch time for temperature fault
TEMPERATURE SENSE COMPARATOR V(HTF) V(LTF) I(TS) t(DEGL) 2.475 0.485 96 250 2.500 0.500 102 375 2.525 0.515 108 500 V A ms
(2)
IO(PRECHG) +
K(SET)
V(PRECHG) RSET
(3)
IO(TAPER) +
K(SET)
V(TAPER) R SET
(4)
IO(TERM) +
K(SET)
V(TERM)
RSET
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bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
ELECTRICAL CHARACTERISTICS (continued)
over 0C TJ 125C and recommended supply voltage, unless otherwise noted
PARAMETER BATTERY RECHARGE THRESHOLD VRCH t(DEGL) Recharge threshold Deglitch time for recharge detect STAT1, STAT2, and PG OUTPUTS VOL VIL VIH IIL IIH IIL IIH IIH TIMERS t(PRECHG) Precharge time bq24020 bq24022 bq24023 bq24024 bq24025 bq24020 bq24022 bq24023 bq24024 bq24025 bq24026 BQ24027 I(FAULT) Timer fault recovery current SLEEP COMPARATOR V(SLP) Sleep-mode entry threshold voltage Sleep mode exit threshold voltage Sleep mode deglitch time THERMAL SHUTDOWN THRESHOLDS T(SHTDWN) Thermal trip threshold Thermal hysteresis UNDERVOLTAGE LOCKOUT V(UVLO) Undervoltage lockout Hysteresis Decreasing VCC 2.4 2.5 27 2.6 V mV 165 15 C 2.3 V VI(OUT) VO(REG) VCC VI(OUT) +190mV 250 375 500 VCC VI(OUT) +80 mV 1,620 1,620 1,800 1,800 1,930 1,930 Low-level output saturation voltage IO = 5 mA Low-level input voltage High-level input voltage CE, TE or TTE low-level input current CE, TE or TTE high-level input current ISET2 low-level input current ISET2 high-level input current ISET2 high-Z input current IISET2 = 0 IISET2 = VCC -20 40 1 V IIL = 10 A IIL = 20 A 0 1.4 -1 1 A 0.25 0.4 V ISET2, CHARGE ENABLE (CE), TIMER AND TERMINATION ENABLE (TTE), AND TIMER ENABLE (TE) INPUTS V VCC(MIN) 4.5 V, tFALL = 100 ns decreasing below or increasing above threshold, 10 mV overdrive VO(REG) - 0.115 250 VO(REG) - 0.10 375 VO(REG) - 0.085 500 ms V TEST CONDITIONS MIN TYP MAX UNIT
t(TAPER)
Taper time
16,200
18,000
19,300
s
t(CHG)
Charge time
22,680
25,200
27,720
200
A
V
V(SLPEXIT)
2.3 V VI(OUT) VO(REG) AC and USB decreasing below threshold, tFALL = 100 ns, 10 mV overdrive
ms
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bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
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DRC PACKAGE (TOP VIEW) VSS STAT2 STAT1 USB 5 4 3 2 AC 1
DRC PACKAGE (TOP VIEW) VSS STAT2 STAT1 USB 5 4 3 2
AC 1
bq24020DRC bq24025DRC
bq24022DRC
6
7
8
9 TS
10 OUT
6
7
8
9 CE
10 OUT
ISET1 ISET2 CE
ISET1 ISET2 PG
DRC PACKAGE (TOP VIEW) VSS STAT2 STAT1 USB 5 4 3 2
DRC PACKAGE (TOP VIEW) AC 1 VSS STAT2 STAT1 USB 5 4 3 2 AC 1
bq24023DRC bq24024DRC
6
7
8
9
10
6
7
8
9 TS
10 OUT
ISET1 ISET2 CE
TTE OUT
ISET1 ISET2 TTE
DRC PACKAGE (TOP VIEW) VSS STAT2 STAT1 USB 5 4 3 2 AC 1
DRC PACKAGE (TOP VIEW) VSS STAT2 STAT1 USB 5 4 3 2 AC 1
bq24026DRC
BQ24027DRC
6
7
8
9 TS
10 OUT
6
7
8
9 CE
10 OUT
ISET1 ISET2 TE
ISET1 ISET2 PG
6
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bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
Terminal Functions
TERMINAL NAME AC CE ISET1 ISET2 OUT PG STAT1 STAT2 TE TS TTE USB VSS Exposed Thermal Pad I/O bq24020 bq24022 bq24023 bq24024 bq24026 bq24025 BQ24027 1 8 6 7 10 3 4 9 2 5 1 9 6 7 10 8 3 4 2 5 1 8 6 7 10 3 4 9 2 5 1 6 7 10 3 4 9 8 2 5 1 6 7 10 3 4 8 9 2 5 I I I I O O O O I I I I DESCRIPTION AC charge input voltage Charge enable input (active low) Charge current set point for AC input and precharge and taper set point for both AC and USB Charge current set point for USB port (high=500 mA, low=100 mA, hi-z = disable USB charge) Charge current output powergood status output (active low) Charge status output 1 (open-drain) Charge status output 2 (open-drain) Timer enable input (active low) Temperature sense input Timer and termination enable input (active low) USB charge input voltage Ground input There is an internal electrical connection between the exposed thermal pad and VSS pin of the device. The exposed thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all times
pad
pad
pad
pad
pad
-
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SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
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FUNCTIONAL BLOCK DIAGRAM
VI(AC) VI(OUT) VI(REG) VI(SET) REF BIAS AND UVLO + sensefet + USB AC/USB VI(ISET-USB) V(SET) CHG ENABLE AC/USB sensefet sensefet AC VI(OUT)
AC
OUT
USB
VI(USB)
VI(ISET)
ISET1
VO(REG) UVLO V(HTF) I(TS) TS * V(LTF) CE VI(OUT) VI(AC) VI(OUT) TTE OR TE VI(USB) VO(REG) VI(OUT) VI(OUT) * * VI(SET) VI(SET) VI(SET) * t(TAPER) TIMER * TAPER TERM RECHARGE PRECHARGE * SLEEP (AC) THERMAL SHUTDOWN
* SUSPEND
VI(ISET-USB) 100 mA/500 mA
AC/USB CHG ENABLE 500 mA/ 100 mA VBAT ISET1
*
SLEEP (USB) CHARGE CONTROL, TIMER, AND DISPLAY LOGIC
PRECHARGE (C/10) 500 mA/ 100 mA ISET2 USB CHARGE PG
STAT1
STAT2 VSS
* SIGNAL DEGLITCHED
UDG-02185
8
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bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
TYPICAL CHARACTERISTICS
AC DROPOUT VOLTAGE vs
450 400 350 Dropout Voltage - mV 300 250 200 150 IO(OUT) = 250 mA 100 50 0 0 50 100 TJ - Junction Temperature - _C 150 IO(OUT) = 500 mA IO(OUT) = 750 mA
JUNCTION TEMPERATURE
IO(OUT) = 1000 mA
Figure 1.
The bqTINY-II supports a precision Li-Ion, Li-pol charging system suitable for single-cell packs. Figure 3 shows a typical charge profile, application circuit and Figure 4 shows an operational flow chart.
Regulation Voltage Regulation Current Pre-Conditioning Phase Current Regulation Phase Voltage Regulation and Charge Termination Phase
Minimum Charge Voltage
Charge Voltage
Charge Complete
Pre-Conditioning and Taper Detect
Charge Current
t(PRECHG)
t(CHG)
Figure 2. Typical Charging Profile
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SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
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FUNCTIONAL DESCRIPTION
AC ADAPTER VDC GND D+ D- VBUS 1 bq24023DRC AC OUT 10 PACK+ 0.1 F PACK- + SYSTEM INTERFACE SYSTEM
2 3
USB STAT1
TTE CE
9 8
4 GND 5 USB PORT
STAT2 ISET2 7
VSS
ISET1 6 RSET
UDG-02184
Figure 3. Typical Application Circuit
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bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
FUNCTIONAL DESCRIPTION (continued)
POR
SLEEP MODE Vcc > VI(OUT) checked at all times No Indicate SLEEP MODE
Yes Regulate IO(PRECHG) Indicate ChargeIn-Progress
VI(OUT) (LOWV) Yes
Reset and Start t (PRECHG) timer
No Reset all timers, Start t (CHG) timer Regulate Current or Voltage Indicate ChargeIn-Progress
No
VI(OUT) (LOWV) Yes
Yes
t(PRECHG) Expired? t (CHG) Expired? Yes No Yes Fault Condition Indicate Fault No I(TERM) detection? Yes t(TAPER) Expired?
(1)
No
Yes
VI(OUT) VI(OUT)> V(RCH)? No
No
No
I(TAPER) detection? No Yes T off charge urn
Yes
Enable I (FAULT) current No
Yes
VI(OUT) > V(RCH)?
Yes Yes Indicate DONE Disable I(FAULT) current
No
VI(OUT) < V(RCH) ?
(1)
t(TAPER) does not apply to bq24026/7
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SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
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FUNCTIONAL DESCRIPTION (continued)
Figure 4. Operational Flow Chart
AUTONOMOUS POWER SOURCE SELECTION
As default, the bqTINY-II attempts to charge from the AC input. If AC input is not present, the USB is selected. If both inputs are available, the AC adapter has the priority. See for details.
AC > BATTERY AC MODE AC < BATTERY USB > BATTERY USB MODE
UDG-02187
Figure 5. Typical Charging Profile
TEMPERATURE QUALIFICATION (bq24020, bq24024, bq24025, and bq24026 only)
The bqTINY-II continuously monitors battery temperature by measuring the voltage between the TS and VSS pins. An internal current source provides the bias for common 10-k negative-temperature coefficient thermistors (NTC) (see Figure 6). The device compares the voltage on the TS pin with the internal V(LTF) and V(HTF) thresholds to determine if charging is allowed. If a temperature outside the V(LTF) and V(HTF) thresholds is detected, the device immediately suspends the charge by turning off the power FET and holding the timer value (i.e. timers are NOT reset). Charge is resumed when the temperature returns within the normal range. The allowed temperature range for a 103AT-type thermistor is 0C to 45C. However the user may modify these thresholds by adding two external resistors. See Figure 7.
BATTERY PRE-CONDITIONING
If the battery voltage falls below the V(LOWV) threshold during a charge cycle, the bqTINY-II applies a precharge current, IO(PRECHG), to the battery. This feature revives deeply discharged cells. The resistor connected between the ISET1 and VSS, RSET, determines the precharge rate. The V(PRECHG) and K(SET) parameters are specified in the specifications table. Note that this applies to both AC and USB charging. V(PRECGH) I O (PRECHG) + RSET (1) The bqTINY-II activates a safety timer, t(PRECHG), during the conditioning phase. If V(LOWV) threshold is not reached within the timer period, the bqTINY-II turns off the charger and asserts a FAULT code on the STATx pins. Please refer to the TIMER FAULT RECOVERY section for additional details.
bqTINYII ITS 9 VLTF VHTF
UDG-02186
PACK+ + PACK- TS TEMP NTC BATTERY PACK
LTF
bqTINYII ITS TS 9 VLTF
PACK+ + PACK- RT1 TEMP NTC BATTERY PACK
LTF
RT2
HTF
VHTF
UDG-02188
HTF
Figure 6. Temperature Sensing Configuration
Figure 7. Temperature Sensing Thresholds
12
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bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
FUNCTIONAL DESCRIPTION (continued) BATTERY CHARGE CURRENT
The bqTINY-II offers on-chip current regulation with a programmable set point. The resistor connected between the ISET1 and VSS, RSET, determines the AC charge rate. The V(SET) and K(SET) parameters are specified in the specifications table.
IO(OUT) + K(SET) V(SET) RSET
(2)
When charging from a USB port, the host controller has the option of selecting either a 100-mA or a 500-mA charge rate using the ISET2 pin. A low-level signal sets the current at 100 mA, and a high-level signal sets the current at 500 mA. A high-Z input disables USB charging
BATTERY VOLTAGE REGULATION
The voltage regulation feedback is through the OUT pin. This input is tied directly to the positive side of the battery pack. The bqTINY-II monitors the battery-pack voltage between the OUT and VSS pins. When the battery voltage rises to the VO(REG) threshold, the voltage-regulation phase begins and the charging current begins to taper down. As a safety backup, the bqTINY-II also monitors the charge time. If the charge is not terminated within the time period specified by t(CHG), the bqTINY-II turns off the charger and asserts a FAULT code on the STATx pins. Please refer to the TIMER FAULT RECOVERY section for additional details.
CHARGE TAPER DETECTION, TERMINATION AND RECHARGE
The bqTINY-II monitors the charging current during the voltage-regulation phase. When the taper threshold, I(TAPER), is detected, the bqTINY-II initiates the taper timer, t(TAPER). Charge is terminated after the timer expires. The resistor connected between the ISET1 and VSS, RSET, determines the taper detection level. The V(TAPER) and K(SET) parameters are specified in the specifications table. Note that this applies to both AC and USB charging. V(TAPER) K(SET) I (TAPER) + RSET (3) The bqTINY-II resets the taper timer if the charge current rises above the taper threshold, I(TAPER). In addition to taper-current detection, the bqTINY-II terminates charge if the charge current falls below the I(TERM) threshold. This feature allows quick recognition of a battery-removal condition, or insertion of a fully charged battery. Note that the charge timer and taper timer are bypassed for this feature. The resistor connected between the ISET1 and VSS, RSET, determines the taper detection level. The V(TERM) and K(SET) parameters are specified in the specifications table. Note that this applies to both AC and USB charging. V(TERM) K(SET) I (TERM) + R SET (4) After charge termination, the bqTINY-II re-starts the charge when the voltage on the OUT pin falls below the V(RCH) threshold. This feature keeps the battery at full capacity at all times.
Note ON bq24026 AND BQ24027
The bq24026 and BQ24027 monitor the charging current during the voltage-regulation phase. Once the taper threshold, I(TAPER), is detected, the bq24026/27 terminates the charge. There is no taper timer (t(TAPER)) for this version. The resistor connected between the ISET1 and VSS, RSET, determines the taper-detect level for AC input. For USB charge, taper level is fixed at 10% of the 100- or 500-mA charge rate. Also note that there is I(TERM) detection in the bq24026 and the BQ24027.
SLEEP MODE
The bqTINY-II enters low-power sleep mode if both AC and USB are removed from the circuit. This feature prevents draining the battery in the absence of input supply.
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FUNCTIONAL DESCRIPTION (continued) CHARGE STATUS OUTPUTS
The open-drain STAT1 and STAT2 outputs indicate various charger operations as shown in the following table. These status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates the open-drain transistor is turned off. Table 1. Status Pins Summary (1)
CHARGE STATE Precharge in progress Fast charge in progress Charge done Charge suspend (temperature) Timer fault Sleep mode (1) STAT1 ON ON OFF OFF OFF OFF STAT2 ON OFF ON OFF OFF OFF
OFF means the open-drain output transistor on the STAT1 and STAT2 pins is in an off state.
PG OUTPUT
The open-drain PG (power Good) indicates when the AC adapter is present. The output turns ON when a valid voltage is detected. This output is turned off in the sleep mode. The PG pin can be used to drive an LED or to communicate to the host processor.
CE INPUT (CHARGE ENABLE)
The CE digital input is used to disable or enable the charge process. A low-level signal on this pin enables the charge. A high-level signal disables the charge, and places the device in a low-power mode. A high-to-low transition on this pin also resets all timers and timer fault conditions. Note that this applies to both AC and USB charging.
TTE INPUT (TIMER AND TERMINATION ENABLE)
The TTE digital input is used to disable or enable the fast-charge timer and charge-taper detection. A low-level signal on this pin enables the fast-charge timer and taper timer, and a high-level signal disables this feature. Note that this applies to both AC and USB charging.
THERMAL SHUTDOWN AND PROTECTION
The bqTINY-II monitors the junction temperature, TJ, and suspends charging if TJ exceeds T(SHTDWN). Charging resumes when TJ falls approximately 15C below T(SHTDWN).
TE INPUT (TIMER ENABLED)
The TE digital input is used to disable or enable the fast-charge timer. A low-level signal on this pin enables the fast-charge timer and a high-level signal disables this feature. Note that this applies to both AC and USB charging.
14
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bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
TIMER FAULT RECOVERY
As shown in Figure 4, the bqTINY-II provides a recovery method to deal with timer-fault conditions. The following discussion summarizes this method: Condition #1: The charge voltage is above the recharge threshold (V(RCH)), and a timeout fault occurs Recovery method: bqTINY-II waits for the battery voltage to fall below the recharge threshold. This could happen as a result of a load on the battery, self-discharge or battery removal. When the battery voltage falls below the recharge threshold, the bqTINY-II clears the fault and starts a new charge cycle. Toggling POR, CE, or TTE also clears the fault. Condition #2: The charge voltage is below the recharge threshold (V(RCH)), and a timeout fault occurs Recovery method: In this scenario, the bqTINY-II applies the I(FAULT) current. This small current is used to detect a battery-removal condition and remains on as long as the battery voltage stays below the recharge threshold. If the battery voltage goes above the recharge threshold, then the bqTINY-II disables the I(FAULT) current and executes the recovery method described for condition #1. When the battery voltage falls below the recharge threshold, the bqTINY-II clears the fault and starts a new charge cycle. Toggling POR, CE, or TTE also clears the fault.
APPLICATION INFORMATION THERMAL CONSIDERATIONS
The bqTINY-II is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design guidelines for this package are provided in the application note entitled, QFN/SON PCB Attachment Application Note (TI Literature Number SLUA271). The most common measure of package thermal performance is thermal impedance (JA) measured (or modeled) from the device junction to the air surrounding the package surface (ambient). The mathematical expression for JA is: T * TA q JA + J P (5) Where:
* * * TJ = device junction temperature TA = ambient temperature P = device power dissipation
Factors that can greatly influence the measurement and calculation of JA include: * whether or not the device is board mounted * trace size, composition, thickness, and geometry * orientation of the device (horizontal or vertical) * volume of the ambient air surrounding the device under test and airflow_lus549 * whether other surfaces are in close proximity to the device being tested The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal power FET. It can be calculated from the following equation:
P + V IN * V I(BAT) I O(OUT)
(6)
Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest. See Figure 2.
PCB LAYOUT CONSIDERATIONS
It is important to pay special attention to the PCB layout. The following provides some guidelines:
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15
bq24020, bq24022, bq24023 , , bq24024, bq24025, bq24026 BQ24027
SLUS549D - DECEMBER 2002 - REVISED MARCH 2006
www.ti.com
APPLICATION INFORMATION (continued)
* * * * * To obtain optimal performance, the decoupling capacitor from VCC to VSS and the output filter capacitors from OUT to VSS should be placed as close as possible to the bqTINY, with short trace runs to both signal and VSS pins. All low-current VSS connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small-signal ground path and the power-ground path. The BAT pin is the voltage feedback to the device. It should be connected with its trace as close to the battery pack as possible. The high-current charge paths into IN and from the OUT pins must be sized appropriately for the maximum charge current in order to avoid voltage drops in these traces. The bqTINY-II is packaged in a thermally-enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application Note (TI Literature No. SLUA271).
16
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PACKAGE OPTION ADDENDUM
www.ti.com
6-Jul-2006
PACKAGING INFORMATION
Orderable Device BQ24020DRCR BQ24020DRCRG4 BQ24022DRCR BQ24022DRCRG4 BQ24023DRCR BQ24023DRCRG4 BQ24024DRCR BQ24024DRCRG4 BQ24025DRCR BQ24025DRCRG4 BQ24026DRCR BQ24026DRCRG4 BQ24027DRCR BQ24027DRCRG4 BQ24027DRCT BQ24027DRCTG4
(1)
Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type SON SON SON SON SON SON SON SON SON SON SON SON SON SON SON SON
Package Drawing DRC DRC DRC DRC DRC DRC DRC DRC DRC DRC DRC DRC DRC DRC DRC DRC
Pins Package Eco Plan (2) Qty 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 3000 250 250 TBD Green (RoHS & no Sb/Br) TBD
Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU Call TI
MSL Peak Temp (3) Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Call TI Level-2-260C-1 YEAR Call TI
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
6-Jul-2006
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Amplifiers Data Converters DSP Interface Logic Power Mgmt Microcontrollers amplifier.ti.com dataconverter.ti.com dsp.ti.com interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com Applications Audio Automotive Broadband Digital Control Military Optical Networking Security Telephony Video & Imaging Wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2006, Texas Instruments Incorporated www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless
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